Audio signal processing hardware

A/D and D/A

Common aspects of numerical processors

The usual bottlenecks

 ‐the von Neumann bottleneck
 ‐the parameter update problem
 ‐the problem with (guaranteed) memory bandwidth (illustrate with 128 voice sampling synth)

What are DSPs all about and how does one take advantage of them?

RISC

 ‐pipelining
 ‐superscalar architectures
 ‐reduced (but powerful) instruction sets
 ‐register based architecture
 ‐single cycle instructions

Multiply and accumulate (MAC)

Vector and parallel operation

 ‐fine grain parallelism: datalog, vector, anticipatory (should these be mentioned at all?)

Bit inversion

 ‐as an addressing optimization for FFT and other radix‐two butterfly computations (Walsh‐Hadamard?)

Modulo and fractional addressing

 ‐for ring buffering and interpolation

Conditional instructions

 ‐both in prefix forms and as embedded in all instructions (or CPU registers)
 ‐as size optimization/simplification over specialized branching instructions/speed optimization
  ‐when
   ‐branches can be avoided, and
   ‐pipelines stay full

Cache pinning, banked memory and Harward architecture

 ‐pinning aka lockdown
 ‐locked instruction caches work as high level microcode

I/O integration

 ‐esp. audio buses like AES/EBU and I2C(?)

Coefficient generation and on‐chip constants

 ‐constant tables and lookup instructions

Application Specific Integrated Circuits (ASICs)

Computer integration of DSP hardware

 ‐bus logic integration
 ‐bus mastering ASICs and logic gate building blocks
 ‐DMA and IRQ in both directions
 ‐integrated DMA/IRQ controllers
 ‐the problem of bus bandwidth